The present invention relates to a reception apparatus and replica signal generating method, and more particularly, to a reception apparatus and replica signal generating method that adaptively updates tap coefficients of an array combining section and of an equalizer.
A conventional reception apparatus updates tap coefficients of an array combining section and of an equalizer adaptively, and thereby cancels interfering signal components and compensates for a distortion of a received signal generated on a propagation path. An example of the conventional reception apparatus is disclosed in Japanese Laid Open Patent Publication HEI10-336083.
The conventional reception apparatus is explained below using FIGS. 1 to 6. FIG. 1 is a partial block diagram illustrating a schematic configuration of the conventional reception apparatus. FIG. 2 is a partial block diagram illustrating a schematic configuration of a plural array combining section in the conventional reception apparatus. FIG. 3 is a partial block diagram illustrating a schematic configuration of a propagation path estimating section in the conventional reception apparatus. FIGS. 4A to 4D illustrate one example of a delay profile. FIG. 5 is a partial block diagram illustrating a schematic configuration of a Viterbi equalizer in the conventional reception apparatus. FIG. 6 is a partial block diagram illustrating a schematic configuration of a replica generating section in the conventional reception apparatus.
The entire configuration of the conventional reception apparatus is first explained using FIG. 1. In FIG. 1, plural array combining section 12 has processing systems, of which the number is the same as that of antennas, which combine signals received at respective antennas 11, and further combines resultants weighted and then combined for each antenna.
Timing control section 13 acquires symbol synchronization timings from outputs of reception processing sections provided for each antenna in plural array combining section 12. In addition, timing control section 13 is capable of acquiring a symbol synchronization timing from an output from one of the reception processing sections.
Propagation path estimating section 14 estimates a delay profile from outputs of the reception processing sections provided for each antenna in plural array combining section 12, and recognizes a spread condition of received signal components on the time axis. That is, propagation path estimating section 14 performs propagation path estimation. In order to converge the spread of received signal components in a range enabling delay compensation in Viterbi equalizer 16 described later, propagation path estimating section 14 calculates a time adjustment amount (xcfx84 shown in FIG. 4D) for a delayed wave to output to time adjustment section 22 in plural array combining section 12. Propagation path estimating section 14 is capable of performing the propagation path estimation from an output from one of the reception processing sections.
Tap coefficient estimating section 15 estimates a coefficient that minimizes a mean square of an error between a replica signal and a received signal (i.e., a weight based on the least square method), and outputs the estimated coefficient to feed forward filter (FFF) 23 in plural array combining section 12 and replica generating section 56 in Viterbi equalizer 16. The coefficients are used in FFF 23 and multipliers 65 to 69 in replica generating section 56.
Viterbi equalizer 16 generates the replica signal, and makes a decision on the received signal using the Viterbi algorithm with the difference between a received signal component subjected to array combining and the replica signal as likelihood information.
A configuration of plural array combining section 12 is next explained using FIG. 2. While a case is explained herein, for example, where the number of array elements is 2, and the number of path groups is 2, any numbers of array elements and of path groups may be applicable.
In FIG. 2, reception processing sections 21 perform reception processing on received signals from respective antennas. Time adjustment section 22 delays a reception-processing processed received signal based on an output from propagation path estimating section 14. FFF 23 performs weighting processing on the received signal based on the tap coefficient designated from tap coefficient estimating section 15. Combining section 24 combines all the FFF processed signals of respective paths from all antennas.
A configuration of propagation path estimating section 14 is next explained using FIG. 3. In FIG. 3, delay profile estimating section 31 estimates a delay profile of received signals components. An example of the delay profile is illustrated in FIG. 4A. In addition, in order to estimate a delay profile it may be possible to use the correlation value of a received signal with a known signal, or to use an impulse response value.
Maximum detecting section 32 detects a maximum level among power levels of the received signal components spread on the time axis in the estimated delay profile. Based on the maximum level of the power, threshold setting section 33 sets a threshold level to select only a path with excellent received condition. Any method may be applicable to determine the threshold level, for example, there is considered a method of obtaining predetermined percentages of the maximum level, or of subtracting a predetermined value from the maximum level. The delay profile with the threshold level set is illustrated in FIG. 4B.
Extracting section 34 extracts only a path with a received power level exceeding the threshold level set by threshold setting section 33. The delay profile with extracted paths is illustrated in FIG. 4C.
Classifying section 35 classifies the extracted paths into groups (groups of paths). The classification is performed so that the number of states in the Viterbi algorithm becomes as small as possible in consideration of a maximum delay time enabling compensation in Viterbi equalizer 16.
For example, in FIG. 4C, a delay time of a component having the greatest delay among extracted paths is 6T. Assuming herein that the maximum delay time enabling compensation in Viterbi equalizer 16 is up to 4T delay, when a received signal with the delay profile as illustrated in FIG. 4C is input to Viterbi equalizer 16 without any time adjustment, reception performance deteriorates largely due to an effect of the delayed wave beyond a compensation range.
Then, when a group is determined for each 3T delay interval (every 4 components), as illustrated in FIG. 4D, two groups of group A and group B are set. When time adjustment section 22 performs time adjustment on these groups later, since the delay time of the greatest delay component is 3T, signals of the groups can be efficiently equalized in Viterbi equalizer 16 capable of compensating up to 4T delay signal.
Further, when a received signal component group in which the delay time of the greatest delay component is 3T is input to Viterbi equalizer 16 capable of compensating up to 4T delay signal, the number of states in the Viterbi algorithm equals 43=64, for example, at the time the modulation scheme is QPSK. The smaller the number of states is, the smaller the calculation amount is, and the more the processing rate is increased. Accordingly, in order to decrease the calculation amount, classifying section 35 may set the number of states to be as small as possible by determining a group for each delay time interval that is as small as possible in a range allowed by a spread condition of received signal components exceeding the threshold level. In addition, the number of groups is not limited to 2, and is determined arbitrarily.
Time adjustment amount detecting section 36 detects a time adjustment amount. That is, based on the classification result, time adjustment amount detecting section 36 detects a time amount by which each group is delayed to combine the group with the greatest delay group. For example, in this case, since the number of all the groups in FIG. 4D is 2, time adjustment amount detecting section 36 detects a time adjustment amount xcfx84 of group A by which group A is combined with group B that is the greatest delay group to provide to time adjustment section 22. In other words, the time adjustment amount V is a distance between beginning components of respective groups on the time axis. In addition, when there is a plurality of groups besides the greatest delay group, time adjustment amount detecting section 36 detects the time adjustment amount for each group.
A configuration of Viterbi equalizer 16 is next explained using FIG. 5. In FIG. 5, subtracter 51 subtracts a replica signal from a received signal. Error power calculating section 52 calculates power corresponding to an error from the subtracted result in subtracter 51.
Viterbi calculation section 53 is, for example, comprised of an MLSE circuit that performs Maximum Likelihood Sequence Estimation, and makes a decision on a received signal using the calculated power level corresponding to the error as likelihood information.
Memory 54 stores a known signal. Switch 55 outputs the known signal stored in memory 54 to replica generating section 56 in the case of tap coefficient estimation using the known signal, while in the other case except the estimation, outputting a symbol sequence candidate output from Viterbi calculation section 53 to replica generating section 56, based on a symbol synchronization timing output from timing control section 13.
Replica generating section 56 multiplies the known signal delayed based on an output of propagation path estimating section 14 or the symbol sequence candidate of received signal by a tap coefficient estimated in tap coefficient estimating section 15, and thereby generates a replica signal.
A configuration of replica generating section 56 is next explained using FIG. 6. In FIG. 6, each of delay sections 61 to 64 delays an input signal so that the reception apparatus fetches a received signal component at each sample timing. While any number of delay sections may be applicable, the number is herein assumed to be 4. Further, assuming that a delay amount at each delay section is one symbol duration, the reception apparatus is capable of fetching up to 4T delayed wave maximum.
Each of multipliers 65 to 69 multiplies the known signal component or symbol sequence candidate by a respective tap coefficient estimated in tap coefficient estimating section 15. Delayed waves each weighted are added in adder 70. The replica signal is thereby generated.
At this point, since the tap coefficient is estimated so as to minimize the mean square of a difference between the received signal and the replica signal, it is considered that in a constitution where all the tap coefficients are estimated autonomously in tap coefficient estimating section 15, all the tap coefficients converge to 0, and that functions of the array and Viterbi equalizer are lost.
Therefore, a tap coefficient input to multiplier 65 provided at a tap corresponding to a first wave is generally set to a fixed value (for example, 1), and under the condition that the tap coefficient to be multiplied by the first wave is 1, respective optimal tap coefficients to be multiplied by a 1T delayed wave to 4T delayed wave are estimated in tap coefficient estimating section 15, and multiplied respectively in multipliers 66 to 69.
In addition, in a replica generating section of the conventional reception apparatus, while FIG. 6 illustrates the case where the tap coefficient to be multiplied by a first wave is a fixed value of 1, the fixed value is not limited to 1. For example, JP HEI-336083 mentioned previously describes that the tap coefficient is fixed to xe2x88x921 (constant).
Thus, in the conventional reception apparatus which adaptively updates tap coefficients in a replica generating section so as to minimize a mean square of a difference between a received signal and a replica signal, a tap coefficient to be multiplied by a first wave (0T delayed wave) in the replica generating section is set at a fixed value (for example, 1), whereby it does not happen that all the tap coefficients converge to 0. Accordingly, the conventional reception apparatus is capable of updating the tap coefficients stably.
In addition, the tap coefficients for delayed waves are estimated to be optimal when the tap coefficient for a first wave is a fixed value (herein, 1). Accordingly, a tap to which the fixed value is input (hereinafter referred to as xe2x80x9cfixed value input tapxe2x80x9d) is determined to be the tap for the first wave, whereby the tap coefficients can be estimated to maximize the SNR (Signal Noise Ratio) of the first wave.
In the conventional reception apparatus, however, there is a problem that the SNR of a received signal is not reserved sufficiently when a received level of a first wave falls below a received level of a delayed wave due to an effect of fading or the like.
In other words, when a position of the fixed value input tap is fixed to be a tap corresponding to the first wave, the conventional reception apparatus operates so as to maximize the SNR of the first wave even in a condition where the received level of the first wave falls below the received level of the delayed wave. As a result, the conventional reception apparatus is not capable of obtaining the SNR of the received signal sufficiently despite the delayed wave with a sufficient received level to some extent arriving.
It is an object of the present invention to provide a reception apparatus and replica signal generating method enabling improved reception performance even in a condition where a received level of a first wave falls below a received level of a delayed wave.
To achieve the above object, in the present invention, a position of a fixed value input tap is made variable at the time a replica signal is generated, based on received signal components subjected to time adjustment and then combining in such a way as to converge the components in a range enabling the compensation in an equalizer.